Ok, I've been battling with my logic analyzer for a while but I finally have it going and ran some tests with the SWTPcSBc. I ran a small program on the Propeller in Spin language to read the disk enable line. As soon as it registers it high, it pulses a signal on a pin. This is a test for me to see if I can capture the address and data bus signals. Well, the results of just toggling a pin with Spin code was horrible, 10ms which is way too slow. So, I had to rethink this project a little. I thought about going back to my favorite ATmega AVR's and make a disk controller that way, but I always kept coming back to the Propeller. The FAT32 driver is established, and it works. So, what I need to do was see if I could read the disk enable pin and toggle a response fast enough for the system. The way to do that is assembly with the Propeller. Not as easy as RISC based micros but still is a good solution. The logic analyzer is just a small test that took 2 days to get right. The pins are disk enable, my test output pin, R/W, E (like phase 0), and 4 address lines. The test was to see how quickly the pin is read and responds.
Ignore signal 9 and A4, they are pins not attached. It takes about 500ns to accept a trigger on the Disk E signal, then trigger itself on the Test read pin. For those studying 8 bit bus signals, look at how long we have to work with compared E at 1MHz. Being able to acknoledge Disk E fast is important becuase there is a HALT pin on the CPU if I need more time to do functions. Although, I don't think I will. Reading at the triggered line, the address it was reading was A0=1, A1=0, A2=1, A3=0. Enable is E01x so the A0-A3 decodes to 5 so it was hitting on E015. The program running was the monitor memory test program. I was testing addresses E010-E01F.
Next step is to try and place a response on the data bus during read and disk e. By the way, Disk Enable for now is only active during E so it is a short pulse.
More to come as I progress, slowly.